"Sure!" (hands over HP-25C)
<start counting seconds...>
"Hey, where's the equals key?"
Really hoping that ghidra can add support for non-byte aligned memory regions some day. So many cool 4-bit architectures out there and attempting to shoehorn them into ghidra produces not great results
https://baltazarstudios.com/files/calculator-d/Calculator.ht...
https://baltazarstudios.com/files/calculator/Calculator.html
This WebAsm code is compiled using Qt and Verilator so it runs the "hardware" and its microcode inside the simple UI shell that provides the calc interface. In the debug version you can list the ucode, set breakpoints, see regs etc.
Also, let us all hate on denomals! :)
Blog post 6 had an error where the picture of a HP-71B (I have one and used its Forth/Assembler ROM manual to write the first HP-48 ROM decoder) where the caption says it is a 48GX (both used a Saturn CPU).
are there videos available?
I'm holding in my hand a 4-bit Von Neumann Mostek MK50310N that my father and I used to use to build calculators long ago. Although Mostek made chips for HP (such as the HP-35), they weren't commercially available, but the 50310 was. We could only dream of a project such as yours. I was happy when the "open source" NumWorks was released, but this project aligns more with my interests.
Will definitely install the Qt simulator - would be even better to build one IRL!
What is the trick to engineering HP calculator keys? Nobody gets keys right like the old HP calculators.
In this age of 3D printing and fast prototypes, we really ought to be able to crack this.
This project implements a fully functional scientific calculator in hardware using an FPGA. It includes a custom soft CPU, microcode firmware, and supporting tools.
For the full story, see the blog.
Try it in a web browser:

| Folder | Description |
|---|---|
verilog/ |
SystemVerilog source files for the CPU, ALU, I/O, and test benches |
ucode/ |
Microcode (firmware) for the soft CPU |
quartus/ |
Quartus project files for FPGA synthesis |
modelsim/ |
ModelSim simulation setup |
Qt/ |
Qt-based simulator and debugger (uses Verilator) |
calctest/ |
Command-line test harness for hardware verification (uses Verilator) |
tools/ |
Assembler and script compiler for the microcode |
Pathfinding/ |
Algorithm research and verification projects |
The fastest way to try the calculator is to build the Qt simulator:
# From WSL2
cd /mnt/c/Projects/FPGA-Calculator/verilog
make qt
Then open Qt/Calculator.pro in Qt Creator and build for "Desktop Qt MSVC2022 64 Bit".
See the verilog/ and Qt/ folders for detailed instructions.
Install these tools depending on your target:
| Tool | Purpose | Notes |
|---|---|---|
| Verilator | Verilog simulation | Required for Qt simulator |
| Qt | Desktop/WebAssembly/Android app | Version 6.9+ |
| Quartus | FPGA synthesis | Version 13.0 SP1 for Cyclone II |
| ModelSim | Waveform simulation | Optional |
| Visual Studio 2022 | C++ compiler for Qt | Community Edition |
| Python 3 | Assembler and tools |
Verilator runs in WSL2 (Windows Subsystem for Linux). The project source files reside on a Windows partition and are accessed from WSL2.
| Target | Verilator Version | Notes |
|---|---|---|
| Desktop (Qt/MSVC) | 5.x (latest) | Recommended |
| WebAssembly | 4.228 | Required (no thread support) |
# Install prerequisites
sudo apt-get install build-essential autoconf flex libfl-dev bison
# Clone and build Verilator
git clone https://github.com/verilator/verilator
cd verilator
git checkout v5.042 # For Desktop, or v4.228 for WebAssembly
autoconf
./configure
make -j8
make test
# Set environment (add to .bashrc for persistence)
export VERILATOR_ROOT=$(pwd)
Optionally install GtkWave for viewing waveforms:
sudo apt install gtkwave
| Target | Command | Description |
|---|---|---|
| Qt Simulator | make qt in verilog/ |
Build for Qt desktop application |
| Calctest | make calctest in verilog/, then make in calctest/ |
Command-line test harness |
| ModelSim | make test_self in verilog/ |
CPU self-test for ModelSim |
| FPGA Hardware | make revB in verilog/ |
Assemble microcode for RevB board |
See the README files in each subfolder for detailed build instructions:
Independent research and verification projects:
| Folder | Description |
|---|---|
Pathfinding/Proto/ |
BCD arithmetic golden reference for hardware verification (submodule) |
Pathfinding/Proof/ |
Proofs of concept for complex operations using basic arithmetic |
Pathfinding/Methods/ |
C++ implementations of calculator algorithms (deprecated) |
Pathfinding/Input/ |
Numerical input state machine simulation |
Pathfinding/Mockup/ |
Keyboard layout design and user interaction testing |
This project is licensed under the Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.
You are free to:
Under the following terms:
They showed us how they computed the key dimensions and typography with an (HP) minicomputer, then had it print out the commands for some kind of numerically controlled cutting machine on paper tapes using an old ASR33 teletype.
The cutting machine generated moulds for the injection moulding machines making the keys.
The keys are in two parts: light coloured digits and symbols and darker plastic forming the shape of the key itself and surrounding the lighter symbol plastic. As a result, they can be worn down but they can never wear out.
Creating the kind of quality video we're all used to seeing is beyond my skill level and ... motivation.
Zilog Z80 improved this, so that on it DAA could also be used after a subtraction, when it would correctly adjust the result for implementing BCD subtraction.
This was one of the Z80 improvements that were considered important at the time of its launch.
While I have never considered worthwhile to do BCD arithmetic instead of converting the decimal numbers to binary numbers, the DAA instruction on all Intel 8080 successors, including on IBM PC compatible computers, was very convenient for converting binary numbers to their ASCII character string hexadecimal representation, for printing or display purposes (because the decimal adjusting happens to add the correct ASCII offset between '0' ... '9' and 'A' ... 'F', so the conversion to ASCII can be done branchless).
This is why network RFCs talk of "octets", to avoid the ambiguity. Octets are always 8 bits.
I have in my hand (I guess I like using that phase today), my father's original receipt for the HP-45 (it's with the box and manual). $299.00 in 1975, which is $1,850 today(!!!).
Relatively speaking, electronics are very, very cheap today compared to what they used to be. Still appreciate that my $30 CASIO does 90% of that the NumWorks can do, but I'm happy to support upstarts such as NumWorks.
On the Z80 and 8086, the code can be made one byte shorter by taking advantage of adjust-after-subtraction, which the 8080 didn't have (and on 6502 worked differently):
CP 10 / CMP AL,10 ;set carry if valid decimal digit
SBC A,69H / SBB AL,69H ;0..9 => 96h..9Fh (auxC=1), 10..15 => A1h..A6h (auxC=0)
DAA / DAS ;subtract 66h if auxC set, 60h if clearThe first book match I get for "nibble" near "byte" is in the 1964 "System 360 Assembler Language" by Don H. Stabley uses nibble. The earliest match I can find for "nybble" in relation to computers was the 1968 "Encyclopedia of library and information science". Nybble (and likely nibble) itself doesn't seem to have taken off until around the mid 1970s https://books.google.com/ngrams/graph?content=nybble&year_st...
References to the coining of the term in 1958 of course don't provide a textual source.
(* technically, a 'foot' is not a standard unit of measure but that's due to the long history of 'foot' not being standardized until relatively recently)
12'b0000_0000_001?: begin : instr_daas // DAA, DAS
if (flags[BF_BIT])
rx[0] <= rx[0] + (op_is_daa ? 4'd6 : 4'd10);
flags[CF_BIT] <= flags[BF_BIT];
state <= FETCH;
end : instr_daas